@ -114,6 +114,15 @@ void nicReboot(void)
enc28j60Reboot ( ) ;
enc28j60Reboot ( ) ;
}
}
uint16_t nicGetChecksum ( uint8_t * packet , uint16_t len )
{
# ifdef ENC28J60_CHECKSUM_ENABLED
enc28j60getChecksum ( packet , len ) ;
# else
return 0x0000 ;
# endif
}
void enc28j60Reboot ( void )
void enc28j60Reboot ( void )
{
{
# ifndef ENC28J60_HARD_RESET_DISABLED
# ifndef ENC28J60_HARD_RESET_DISABLED
@ -215,6 +224,68 @@ void enc28j60ReadBuffer(uint16_t len, uint8_t* data)
sbi ( ENC28J60_CONTROL_PORT , ENC28J60_CONTROL_CS ) ;
sbi ( ENC28J60_CONTROL_PORT , ENC28J60_CONTROL_CS ) ;
}
}
uint16_t enc28j60getChecksum ( uint8_t * packet , uint16_t len )
//void enc28j60PacketSend(uint16_t len, uint8_t* packet)
{
// Errata workaround #10 Transmit Logic
if ( enc28j60Read ( EIR ) & EIR_TXERIF )
{
enc28j60WriteOp ( ENC28J60_BIT_FIELD_SET , ECON1 , ECON1_TXRST ) ;
enc28j60WriteOp ( ENC28J60_BIT_FIELD_CLR , ECON1 , ECON1_TXRST ) ;
enc28j60WriteOp ( ENC28J60_BIT_FIELD_CLR , EIR , EIR_TXERIF ) ;
}
// Set the write pointer to start of transmit buffer area
enc28j60Write ( EWRPTL , TXSTART_INIT ) ;
enc28j60Write ( EWRPTH , TXSTART_INIT > > 8 ) ;
// Set the TXND pointer to correspond to the packet size given
enc28j60Write ( ETXNDL , ( TXSTART_INIT + len ) ) ;
enc28j60Write ( ETXNDH , ( TXSTART_INIT + len ) > > 8 ) ;
// write per-packet control byte
enc28j60WriteOp ( ENC28J60_WRITE_BUF_MEM , 0 , 0x00 ) ;
// copy the packet into the transmit buffer
enc28j60WriteBuffer ( len , packet ) ;
// return the calculated checksum
return enc28j60doHardwareChecksum ( len ) ;
}
uint16_t enc28j60doHardwareChecksum ( uint16_t len )
{
// Set EDMASTL to the beggining of the used memory
enc28j60Write ( EDMASTL , TXSTART_INIT ) ;
enc28j60Write ( EDMASTH , TXSTART_INIT > > 8 ) ;
// Set EDMAND to the end of the memory used
enc28j60Write ( EDMANDL , ( TXSTART_INIT + len ) ) ;
enc28j60Write ( EDMANDH , ( TXSTART_INIT + len ) > > 8 ) ;
// Set EDMADST to the beggining of the DMA buffer
enc28j60Write ( EDMADSTL , TXSTART_INIT ) ;
enc28j60Write ( EDMADSTH , TXSTART_INIT > > 8 ) ;
// Enable DMA copy mode
enc28j60WriteOp ( ENC28J60_BIT_FIELD_CLR , ECON1 , ECON1_CSUMEN ) ;
enc28j60WriteOp ( ENC28J60_BIT_FIELD_SET , ECON1 , ECON1_DMAST ) ;
// Wait for the DMA copy to complete
while ( ! ( enc28j60Read ( EIR ) & EIR_DMAIF ) ) ;
// Start the checksum calculation
enc28j60WriteOp ( ENC28J60_BIT_FIELD_SET , ECON1 , ECON1_CSUMEN ) ;
enc28j60WriteOp ( ENC28J60_BIT_FIELD_SET , ECON1 , ECON1_DMAST ) ;
// Wait for the checksum calculation to complete
while ( ! ( enc28j60Read ( ECON1 ) & ~ ECON1_DMAST & & enc28j60Read ( EIR ) & EIR_DMAIF ) ) ;
// Read back and return the calculated checksum
return ( uint16_t ) ( enc28j60Read ( EDMACSL ) | ( uint16_t ) enc28j60Read ( EDMACSH ) < < 8 ) ;
}
void enc28j60WriteBuffer ( uint16_t len , uint8_t * data )
void enc28j60WriteBuffer ( uint16_t len , uint8_t * data )
{
{
// assert CS
// assert CS